Eleanor Bartle fa8935426b Cleaned up RISC-V instruction creation, added 32-bit immediates (#6077) ...

* Implemented all R-type arithmetic/logical instructions

* Implemented all I-type arithmetic/logical instructions

* Implemented all load and store instructions

* Implemented all of RV64I except FENCE

2020-08-18 00:30:00 -04:00

..

c.zig

CBE: minor doc change

2020-08-16 20:32:50 -04:00

riscv64.zig

Cleaned up RISC-V instruction creation, added 32-bit immediates (#6077)

2020-08-18 00:30:00 -04:00

wasm.zig

stage2/wasm: write exports on flush, cleanup

2020-08-18 01:01:13 +02:00

x86_64.zig

stage2: basic support for parameters .debug_info

2020-08-11 22:23:32 -07:00

x86.zig

stage2: basic support for parameters .debug_info

2020-08-11 22:23:32 -07:00