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GH-146128: Fix AArch64 multi-instruction constants and relocations (GH-148598)
Fix AArch64 multi-instruction constants and relocations * Elimates rendundant orr xN, xN, 0xffff after 16 or 32 bit loads * Merges adrp (21rx) and ldr (12) relocations into single 33rx relocation, when safe to do so.
This commit is contained in:
@@ -355,6 +355,14 @@ patch_aarch64_12(unsigned char *location, uint64_t value)
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set_bits(loc32, 10, value, shift, 12);
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}
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// Relaxable 12-bit low part of an absolute address.
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// Usually paired with patch_aarch64_21rx (below).
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void
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patch_aarch64_12x(unsigned char *location, uint64_t value)
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{
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patch_aarch64_12(location, value);
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}
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// 16-bit low part of an absolute address.
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void
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patch_aarch64_16a(unsigned char *location, uint64_t value)
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@@ -415,6 +423,14 @@ patch_aarch64_21r(unsigned char *location, uint64_t value)
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set_bits(loc32, 5, value, 2, 19);
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}
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// Relaxable 21-bit count of pages between this page and an absolute address's
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// page. Usually paired with patch_aarch64_12x (above).
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void
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patch_aarch64_21rx(unsigned char *location, uint64_t value)
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{
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patch_aarch64_21r(location, value);
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}
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// 21-bit relative branch.
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void
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patch_aarch64_19r(unsigned char *location, uint64_t value)
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@@ -445,6 +461,56 @@ patch_aarch64_26r(unsigned char *location, uint64_t value)
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set_bits(loc32, 0, value, 2, 26);
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}
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// A pair of patch_aarch64_21rx and patch_aarch64_12x.
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void
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patch_aarch64_33rx(unsigned char *location_a, unsigned char *location_b, uint64_t value)
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{
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uint32_t *loc32_a = (uint32_t *)location_a;
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uint32_t *loc32_b = (uint32_t *)location_b;
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// Try to relax the pair of GOT loads into an immediate value:
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assert(IS_AARCH64_ADRP(*loc32_a));
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assert(IS_AARCH64_LDR_OR_STR(*loc32_b));
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unsigned char reg = get_bits(*loc32_a, 0, 5);
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// There should be only one register involved:
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assert(reg == get_bits(*loc32_a, 0, 5)); // ldr's output register.
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assert(reg == get_bits(*loc32_b, 5, 5)); // ldr's input register.
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uint64_t relaxed = *(uint64_t *)value;
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if (relaxed < (1UL << 16)) {
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// adrp reg, AAA; ldr reg, [reg + BBB] -> movz reg, XXX; nop
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*loc32_a = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | reg;
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*loc32_b = 0xD503201F;
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return;
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}
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if (relaxed < (1ULL << 32)) {
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// adrp reg, AAA; ldr reg, [reg + BBB] -> movz reg, XXX; movk reg, YYY
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*loc32_a = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | reg;
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*loc32_b = 0xF2A00000 | (get_bits(relaxed, 16, 16) << 5) | reg;
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return;
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}
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int64_t page_delta = (relaxed >> 12) - ((uintptr_t)location_a >> 12);
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if (page_delta >= -(1L << 20) &&
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page_delta < (1L << 20))
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{
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// adrp reg, AAA; ldr reg, [reg + BBB] -> adrp reg, AAA; add reg, reg, BBB
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patch_aarch64_21rx(location_a, relaxed);
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*loc32_b = 0x91000000 | get_bits(relaxed, 0, 12) << 10 | reg << 5 | reg;
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return;
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}
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relaxed = value - (uintptr_t)location_a;
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if ((relaxed & 0x3) == 0 &&
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(int64_t)relaxed >= -(1L << 19) &&
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(int64_t)relaxed < (1L << 19))
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{
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// adrp reg, AAA; ldr reg, [reg + BBB] -> ldr reg, XXX; nop
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*loc32_a = 0x58000000 | (get_bits(relaxed, 2, 19) << 5) | reg;
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*loc32_b = 0xD503201F;
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return;
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}
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// Couldn't do it. Just patch the two instructions normally:
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patch_aarch64_21rx(location_a, value);
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patch_aarch64_12x(location_b, value);
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}
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// Relaxable 32-bit relative address.
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void
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patch_x86_64_32rx(unsigned char *location, uint64_t value)
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+221
-100
@@ -99,6 +99,9 @@ class InstructionKind(enum.Enum):
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RETURN = enum.auto()
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SMALL_CONST_1 = enum.auto()
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SMALL_CONST_2 = enum.auto()
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SMALL_CONST_MASK = enum.auto()
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LARGE_CONST_1 = enum.auto()
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LARGE_CONST_2 = enum.auto()
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OTHER = enum.auto()
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@@ -107,6 +110,7 @@ class Instruction:
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kind: InstructionKind
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name: str
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text: str
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register: str | None
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target: str | None
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def is_branch(self) -> bool:
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@@ -115,7 +119,11 @@ class Instruction:
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def update_target(self, target: str) -> "Instruction":
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assert self.target is not None
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return Instruction(
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self.kind, self.name, self.text.replace(self.target, target), target
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self.kind,
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self.name,
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self.text.replace(self.target, target),
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self.register,
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target,
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)
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def update_name_and_target(self, name: str, target: str) -> "Instruction":
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@@ -124,6 +132,7 @@ class Instruction:
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self.kind,
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name,
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self.text.replace(self.name, name).replace(self.target, target),
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self.register,
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target,
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)
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@@ -193,8 +202,12 @@ class Optimizer:
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globals: set[str] = dataclasses.field(default_factory=set)
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_re_small_const_1 = _RE_NEVER_MATCH
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_re_small_const_2 = _RE_NEVER_MATCH
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_re_small_const_mask = _RE_NEVER_MATCH
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_re_large_const_1 = _RE_NEVER_MATCH
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_re_large_const_2 = _RE_NEVER_MATCH
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const_reloc = "<Not supported>"
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_frame_pointer_modify: typing.ClassVar[re.Pattern[str]] = _RE_NEVER_MATCH
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label_index: int = 0
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def __post_init__(self) -> None:
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# Split the code into a linked list of basic blocks. A basic block is an
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@@ -255,6 +268,7 @@ class Optimizer:
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def _parse_instruction(self, line: str) -> Instruction:
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target = None
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reg = None
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if match := self._re_branch.match(line):
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target = match["target"]
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name = match["instruction"]
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@@ -276,15 +290,34 @@ class Optimizer:
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elif match := self._re_small_const_1.match(line):
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target = match["value"]
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name = match["instruction"]
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reg = match["register"]
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kind = InstructionKind.SMALL_CONST_1
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elif match := self._re_small_const_2.match(line):
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target = match["value"]
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name = match["instruction"]
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reg = match["register"]
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kind = InstructionKind.SMALL_CONST_2
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elif match := self._re_small_const_mask.match(line):
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target = match["value"]
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name = match["instruction"]
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reg = match["register"]
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if reg.startswith("w"):
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reg = "x" + reg[1:]
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kind = InstructionKind.SMALL_CONST_MASK
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elif match := self._re_large_const_1.match(line):
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target = match["value"]
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name = match["instruction"]
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reg = match["register"]
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kind = InstructionKind.LARGE_CONST_1
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elif match := self._re_large_const_2.match(line):
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target = match["value"]
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name = match["instruction"]
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reg = match["register"]
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kind = InstructionKind.LARGE_CONST_2
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else:
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name, *_ = line.split(" ")
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kind = InstructionKind.OTHER
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return Instruction(kind, name, line, target)
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return Instruction(kind, name, line, reg, target)
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def _invert_branch(self, inst: Instruction, target: str) -> Instruction | None:
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assert inst.is_branch()
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@@ -487,73 +520,13 @@ class Optimizer:
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name = target[len(self.symbol_prefix) :]
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label = f"{self.symbol_prefix}{reloc}_JIT_RELOCATION_{name}_JIT_RELOCATION_{index}:"
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block.instructions[-1] = Instruction(
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InstructionKind.OTHER, "", label, None
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InstructionKind.OTHER, "", label, None, None
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)
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block.instructions.append(branch.update_target("0"))
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def _make_temp_label(self, index: int) -> Instruction:
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marker = f"jit_temp_{index}:"
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return Instruction(InstructionKind.OTHER, "", marker, None)
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def _fixup_constants(self) -> None:
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if not self.supports_small_constants:
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return
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index = 0
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for block in self._blocks():
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fixed: list[Instruction] = []
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small_const_index = -1
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for inst in block.instructions:
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if inst.kind == InstructionKind.SMALL_CONST_1:
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marker = f"jit_pending_{inst.target}{index}:"
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fixed.append(self._make_temp_label(index))
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index += 1
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small_const_index = len(fixed)
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fixed.append(inst)
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elif inst.kind == InstructionKind.SMALL_CONST_2:
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if small_const_index < 0:
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fixed.append(inst)
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continue
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small_const_1 = fixed[small_const_index]
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if not self._small_consts_match(small_const_1, inst):
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small_const_index = -1
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fixed.append(inst)
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continue
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assert small_const_1.target is not None
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if small_const_1.target.endswith("16"):
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fixed[small_const_index] = self._make_temp_label(index)
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index += 1
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else:
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assert small_const_1.target.endswith("32")
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patch_kind, replacement = self._small_const_1(small_const_1)
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if replacement is not None:
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label = f"{self.const_reloc}{patch_kind}_JIT_RELOCATION_CONST{small_const_1.target[:-3]}_JIT_RELOCATION_{index}:"
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index += 1
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fixed[small_const_index - 1] = Instruction(
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InstructionKind.OTHER, "", label, None
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)
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fixed[small_const_index] = replacement
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patch_kind, replacement = self._small_const_2(inst)
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if replacement is not None:
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assert inst.target is not None
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label = f"{self.const_reloc}{patch_kind}_JIT_RELOCATION_CONST{inst.target[:-3]}_JIT_RELOCATION_{index}:"
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index += 1
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fixed.append(
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Instruction(InstructionKind.OTHER, "", label, None)
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)
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fixed.append(replacement)
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small_const_index = -1
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else:
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fixed.append(inst)
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block.instructions = fixed
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def _small_const_1(self, inst: Instruction) -> tuple[str, Instruction | None]:
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raise NotImplementedError()
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def _small_const_2(self, inst: Instruction) -> tuple[str, Instruction | None]:
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raise NotImplementedError()
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def _small_consts_match(self, inst1: Instruction, inst2: Instruction) -> bool:
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raise NotImplementedError()
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"Fixup loading of constants. Overridden by OptimizerAArch64"
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pass
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def _validate(self) -> None:
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for block in self._blocks():
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@@ -602,52 +575,200 @@ class OptimizerAArch64(Optimizer): # pylint: disable = too-few-public-methods
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supports_small_constants = True
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_re_small_const_1 = re.compile(
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r"\s*(?P<instruction>adrp)\s+.*(?P<value>_JIT_OP(ARG|ERAND(0|1))_(16|32)).*"
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r"\s*(?P<instruction>adrp)\s+(?P<register>x\d\d?),.*(?P<value>_JIT_OP(ARG|ERAND(0|1))_(16|32)).*"
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)
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_re_small_const_2 = re.compile(
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r"\s*(?P<instruction>ldr)\s+.*(?P<value>_JIT_OP(ARG|ERAND(0|1))_(16|32)).*"
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r"\s*(?P<instruction>ldr)\s+(?P<register>x\d\d?),.*(?P<value>_JIT_OP(ARG|ERAND(0|1))_(16|32)).*"
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)
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_re_small_const_mask = re.compile(
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r"\s*(?P<instruction>and)\s+[xw]\d\d?, *(?P<register>[xw]\d\d?).*(?P<value>0xffff)"
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)
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_re_large_const_1 = re.compile(
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r"\s*(?P<instruction>adrp)\s+(?P<register>x\d\d?),.*:got:(?P<value>[_A-Za-z0-9]+).*"
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)
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_re_large_const_2 = re.compile(
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r"\s*(?P<instruction>ldr)\s+(?P<register>x\d\d?),.*:got_lo12:(?P<value>[_A-Za-z0-9]+).*"
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)
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const_reloc = "CUSTOM_AARCH64_CONST"
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_frame_pointer_modify = re.compile(r"\s*stp\s+x29.*")
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def _get_reg(self, inst: Instruction) -> str:
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_, rest = inst.text.split(inst.name)
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reg, *_ = rest.split(",")
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return reg.strip()
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def _make_temp_label(self, note: object = None) -> Instruction:
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marker = f"jit_temp_{self.label_index}:"
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if note is not None:
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marker = f"{marker[:-1]}_{note}:"
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self.label_index += 1
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return Instruction(InstructionKind.OTHER, "", marker, None, None)
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def _small_const_1(self, inst: Instruction) -> tuple[str, Instruction | None]:
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assert inst.kind is InstructionKind.SMALL_CONST_1
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assert inst.target is not None
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if "16" in inst.target:
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return "", None
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pre, _ = inst.text.split(inst.name)
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return "16a", Instruction(
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InstructionKind.OTHER, "movz", f"{pre}movz {self._get_reg(inst)}, 0", None
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def _both_registers_same(self, inst: Instruction) -> bool:
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reg = inst.register
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assert reg is not None
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if reg not in inst.text:
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reg = "w" + reg[1:]
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return inst.text.count(reg) == 2
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def _fixup_small_constant_pair(
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self, output: list[Instruction], label_index: int, inst: Instruction
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) -> str | None:
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first = output[label_index + 1]
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reg = first.register
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if reg is None or inst.register != reg:
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output.append(
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Instruction(InstructionKind.OTHER, "", "# registers differ", None, None)
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)
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output.append(inst)
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return None
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assert first.target is not None
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if first.target != inst.target:
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output.append(
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Instruction(InstructionKind.OTHER, "", "# targets differ", None, None)
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)
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output.append(inst)
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return None
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if not self._both_registers_same(inst):
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output.append(
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Instruction(
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InstructionKind.OTHER, "", "# not same register", None, None
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)
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)
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output.append(inst)
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return None
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pre, _ = first.text.split(first.name)
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output[label_index + 1] = Instruction(
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InstructionKind.OTHER,
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"movz",
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f"{pre}movz {reg}, 0",
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reg,
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None,
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)
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def _small_const_2(self, inst: Instruction) -> tuple[str, Instruction | None]:
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assert inst.kind is InstructionKind.SMALL_CONST_2
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assert inst.target is not None
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pre, _ = inst.text.split(inst.name)
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if "16" in inst.target:
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return "16a", Instruction(
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InstructionKind.OTHER,
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"movz",
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f"{pre}movz {self._get_reg(inst)}, 0",
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None,
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label_text = f"{self.const_reloc}16a_JIT_RELOCATION_CONST{first.target[:-3]}_JIT_RELOCATION_{self.label_index}:"
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self.label_index += 1
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output[label_index] = Instruction(
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InstructionKind.OTHER, "", label_text, None, None
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)
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assert first.target.endswith("16") or first.target.endswith("32")
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if first.target.endswith("32"):
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label_text = f"{self.const_reloc}16b_JIT_RELOCATION_CONST{first.target[:-3]}_JIT_RELOCATION_{self.label_index}:"
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self.label_index += 1
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output.append(
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Instruction(InstructionKind.OTHER, "", label_text, None, None)
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)
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pre, _ = inst.text.split(inst.name)
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output.append(
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Instruction(
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InstructionKind.OTHER,
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"movk",
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f"{pre}movk {reg}, 0, lsl #16",
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reg,
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None,
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)
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)
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return reg
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def may_use_reg(self, inst: Instruction, reg: str | None) -> bool:
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"Return False if `reg` is not explicitly used by this instruction"
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if reg is None:
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return False
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assert reg.startswith("w") or reg.startswith("x")
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xreg = f"x{reg[1:]}"
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wreg = f"w{reg[1:]}"
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if wreg in inst.text:
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return True
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if xreg in inst.text:
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# Exclude false positives like 0x80 for x8
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count = inst.text.count(xreg)
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number_count = inst.text.count("0" + xreg)
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return count > number_count
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return False
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def _fixup_large_constant_pair(
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self, output: list[Instruction], label_index: int, inst: Instruction
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) -> None:
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first = output[label_index + 1]
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reg = first.register
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if reg is None or inst.register != reg:
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output.append(inst)
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return
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assert first.target is not None
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if first.target != inst.target:
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output.append(inst)
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return
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label = f"{self.const_reloc}33a_JIT_PAIR_{first.target}_JIT_PAIR_{self.label_index}:"
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output[label_index] = Instruction(InstructionKind.OTHER, "", label, None, None)
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label = (
|
||||
f"{self.const_reloc}33b_JIT_PAIR_{inst.target}_JIT_PAIR_{self.label_index}:"
|
||||
)
|
||||
self.label_index += 1
|
||||
output.append(Instruction(InstructionKind.OTHER, "", label, None, None))
|
||||
output.append(inst)
|
||||
|
||||
def _fixup_mask(self, output: list[Instruction], inst: Instruction) -> None:
|
||||
if self._both_registers_same(inst):
|
||||
# Nop
|
||||
pass
|
||||
else:
|
||||
return "16b", Instruction(
|
||||
InstructionKind.OTHER,
|
||||
"movk",
|
||||
f"{pre}movk {self._get_reg(inst)}, 0, lsl #16",
|
||||
None,
|
||||
)
|
||||
output.append(inst)
|
||||
|
||||
def _small_consts_match(self, inst1: Instruction, inst2: Instruction) -> bool:
|
||||
reg1 = self._get_reg(inst1)
|
||||
reg2 = self._get_reg(inst2)
|
||||
return reg1 == reg2
|
||||
def _fixup_constants(self) -> None:
|
||||
for block in self._blocks():
|
||||
fixed: list[Instruction] = []
|
||||
small_const_part: dict[str, int | None] = {}
|
||||
small_const_whole: dict[str, str | None] = {}
|
||||
large_const_part: dict[str, int | None] = {}
|
||||
for inst in block.instructions:
|
||||
if inst.kind == InstructionKind.SMALL_CONST_1:
|
||||
assert inst.register is not None
|
||||
small_const_part[inst.register] = len(fixed)
|
||||
small_const_whole[inst.register] = None
|
||||
large_const_part[inst.register] = None
|
||||
fixed.append(self._make_temp_label(inst.register))
|
||||
fixed.append(inst)
|
||||
elif inst.kind == InstructionKind.SMALL_CONST_2:
|
||||
assert inst.register is not None
|
||||
index = small_const_part.get(inst.register)
|
||||
small_const_part[inst.register] = None
|
||||
if index is None:
|
||||
fixed.append(inst)
|
||||
continue
|
||||
small_const_whole[inst.register] = self._fixup_small_constant_pair(
|
||||
fixed, index, inst
|
||||
)
|
||||
small_const_part[inst.register] = None
|
||||
elif inst.kind == InstructionKind.SMALL_CONST_MASK:
|
||||
assert inst.register is not None
|
||||
reg = small_const_whole.get(inst.register)
|
||||
if reg is not None:
|
||||
self._fixup_mask(fixed, inst)
|
||||
else:
|
||||
fixed.append(inst)
|
||||
elif inst.kind == InstructionKind.LARGE_CONST_1:
|
||||
assert inst.register is not None
|
||||
small_const_part[inst.register] = None
|
||||
small_const_whole[inst.register] = None
|
||||
large_const_part[inst.register] = len(fixed)
|
||||
fixed.append(self._make_temp_label())
|
||||
fixed.append(inst)
|
||||
elif inst.kind == InstructionKind.LARGE_CONST_2:
|
||||
assert inst.register is not None
|
||||
small_const_part[inst.register] = None
|
||||
small_const_whole[inst.register] = None
|
||||
index = large_const_part.get(inst.register)
|
||||
large_const_part[inst.register] = None
|
||||
if index is None:
|
||||
fixed.append(inst)
|
||||
continue
|
||||
self._fixup_large_constant_pair(fixed, index, inst)
|
||||
else:
|
||||
for reg in small_const_part:
|
||||
if self.may_use_reg(inst, reg):
|
||||
small_const_part[reg] = None
|
||||
for reg in small_const_whole:
|
||||
if self.may_use_reg(inst, reg):
|
||||
small_const_whole[reg] = None
|
||||
for reg in small_const_part:
|
||||
if self.may_use_reg(inst, reg):
|
||||
large_const_part[reg] = None
|
||||
fixed.append(inst)
|
||||
block.instructions = fixed
|
||||
|
||||
|
||||
class OptimizerX86(Optimizer): # pylint: disable = too-few-public-methods
|
||||
|
||||
+40
-6
@@ -57,11 +57,12 @@ class HoleValue(enum.Enum):
|
||||
_PATCH_FUNCS = {
|
||||
# aarch64-apple-darwin:
|
||||
"ARM64_RELOC_BRANCH26": "patch_aarch64_26r",
|
||||
"ARM64_RELOC_GOT_LOAD_PAGE21": "patch_aarch64_21r",
|
||||
"ARM64_RELOC_GOT_LOAD_PAGEOFF12": "patch_aarch64_12",
|
||||
"ARM64_RELOC_GOT_LOAD_PAGE21": "patch_aarch64_21rx",
|
||||
"ARM64_RELOC_GOT_LOAD_PAGEOFF12": "patch_aarch64_12x",
|
||||
"ARM64_RELOC_PAGE21": "patch_aarch64_21r",
|
||||
"ARM64_RELOC_PAGEOFF12": "patch_aarch64_12",
|
||||
"ARM64_RELOC_UNSIGNED": "patch_64",
|
||||
# custom aarch64, both darwin and linux:
|
||||
"CUSTOM_AARCH64_BRANCH19": "patch_aarch64_19r",
|
||||
"CUSTOM_AARCH64_CONST16a": "patch_aarch64_16a",
|
||||
"CUSTOM_AARCH64_CONST16b": "patch_aarch64_16b",
|
||||
@@ -70,21 +71,21 @@ _PATCH_FUNCS = {
|
||||
# aarch64-pc-windows-msvc:
|
||||
"IMAGE_REL_ARM64_BRANCH19": "patch_aarch64_19r",
|
||||
"IMAGE_REL_ARM64_BRANCH26": "patch_aarch64_26r",
|
||||
"IMAGE_REL_ARM64_PAGEBASE_REL21": "patch_aarch64_21r",
|
||||
"IMAGE_REL_ARM64_PAGEBASE_REL21": "patch_aarch64_21rx",
|
||||
"IMAGE_REL_ARM64_PAGEOFFSET_12A": "patch_aarch64_12",
|
||||
"IMAGE_REL_ARM64_PAGEOFFSET_12L": "patch_aarch64_12",
|
||||
"IMAGE_REL_ARM64_PAGEOFFSET_12L": "patch_aarch64_12x",
|
||||
# i686-pc-windows-msvc:
|
||||
"IMAGE_REL_I386_DIR32": "patch_32",
|
||||
"IMAGE_REL_I386_REL32": "patch_x86_64_32rx",
|
||||
# aarch64-unknown-linux-gnu:
|
||||
"R_AARCH64_ABS64": "patch_64",
|
||||
"R_AARCH64_ADD_ABS_LO12_NC": "patch_aarch64_12",
|
||||
"R_AARCH64_ADR_GOT_PAGE": "patch_aarch64_21r",
|
||||
"R_AARCH64_ADR_GOT_PAGE": "patch_aarch64_21rx",
|
||||
"R_AARCH64_ADR_PREL_PG_HI21": "patch_aarch64_21r",
|
||||
"R_AARCH64_CALL26": "patch_aarch64_26r",
|
||||
"R_AARCH64_CONDBR19": "patch_aarch64_19r",
|
||||
"R_AARCH64_JUMP26": "patch_aarch64_26r",
|
||||
"R_AARCH64_LD64_GOT_LO12_NC": "patch_aarch64_12",
|
||||
"R_AARCH64_LD64_GOT_LO12_NC": "patch_aarch64_12x",
|
||||
"R_AARCH64_MOVW_UABS_G0_NC": "patch_aarch64_16a",
|
||||
"R_AARCH64_MOVW_UABS_G1_NC": "patch_aarch64_16b",
|
||||
"R_AARCH64_MOVW_UABS_G2_NC": "patch_aarch64_16c",
|
||||
@@ -165,14 +166,30 @@ class Hole:
|
||||
custom_location: str = ""
|
||||
custom_value: str = ""
|
||||
func: str = dataclasses.field(init=False)
|
||||
offset2: int = -1
|
||||
void: bool = False
|
||||
# Convenience method:
|
||||
replace = dataclasses.replace
|
||||
|
||||
def __post_init__(self) -> None:
|
||||
self.func = _PATCH_FUNCS[self.kind]
|
||||
|
||||
def fold(self, other: typing.Self) -> None:
|
||||
"""Combine two holes into a single hole."""
|
||||
assert (
|
||||
self.func == "patch_aarch64_12x" and other.func == "patch_aarch64_21rx"
|
||||
), (self.func, other.func)
|
||||
assert self.value == other.value
|
||||
assert self.symbol == other.symbol
|
||||
assert self.addend == other.addend
|
||||
self.func = "patch_aarch64_33rx"
|
||||
self.offset2 = other.offset
|
||||
other.void = True
|
||||
|
||||
def as_c(self, where: str) -> str:
|
||||
"""Dump this hole as a call to a patch_* function."""
|
||||
if self.void:
|
||||
return ""
|
||||
if self.custom_location:
|
||||
location = self.custom_location
|
||||
else:
|
||||
@@ -194,6 +211,9 @@ class Hole:
|
||||
value += f"{_signed(self.addend):#x}"
|
||||
if self.need_state:
|
||||
return f"{self.func}({location}, {value}, state);"
|
||||
if self.offset2 >= 0:
|
||||
first_location = f"{where} + {self.offset2:#x}"
|
||||
return f"{self.func}({first_location}, {location}, {value});"
|
||||
return f"{self.func}({location}, {value});"
|
||||
|
||||
|
||||
@@ -238,6 +258,10 @@ class StencilGroup:
|
||||
_got_entries: set[int] = dataclasses.field(default_factory=set, init=False)
|
||||
|
||||
def convert_labels_to_relocations(self) -> None:
|
||||
holes_by_offset: dict[int, Hole] = {}
|
||||
first_in_pair: dict[str, Hole] = {}
|
||||
for hole in self.code.holes:
|
||||
holes_by_offset[hole.offset] = hole
|
||||
for name, hole_plus in self.symbols.items():
|
||||
if isinstance(name, str) and "_JIT_RELOCATION_" in name:
|
||||
_, offset = hole_plus
|
||||
@@ -247,6 +271,16 @@ class StencilGroup:
|
||||
int(offset), typing.cast(_schema.HoleKind, reloc), value, symbol, 0
|
||||
)
|
||||
self.code.holes.append(hole)
|
||||
elif isinstance(name, str) and "_JIT_PAIR_" in name:
|
||||
_, offset = hole_plus
|
||||
reloc, target, index = name.split("_JIT_PAIR_")
|
||||
if offset in holes_by_offset:
|
||||
hole = holes_by_offset[offset]
|
||||
if "33a" in reloc:
|
||||
first_in_pair[index] = hole
|
||||
elif "33b" in reloc and index in first_in_pair:
|
||||
first = first_in_pair[index]
|
||||
hole.fold(first)
|
||||
|
||||
def process_relocations(self, known_symbols: dict[str, int]) -> None:
|
||||
"""Fix up all GOT and internal relocations for this stencil group."""
|
||||
|
||||
@@ -208,6 +208,9 @@ class _Target(typing.Generic[_S, _R]):
|
||||
)
|
||||
)
|
||||
tasks = []
|
||||
# If you need to see the generated assembly files,
|
||||
# uncomment line below (and comment out line below that)
|
||||
# with tempfile.TemporaryDirectory("-stencils-assembly", delete=False) as tempdir:
|
||||
with tempfile.TemporaryDirectory() as tempdir:
|
||||
work = pathlib.Path(tempdir).resolve()
|
||||
async with asyncio.TaskGroup() as group:
|
||||
|
||||
Reference in New Issue
Block a user