tcg: Make TCG_TARGET_REG_BITS common

Since we only support 64-bit hosts, there's no real need
to parameterize TCG_TARGET_REG_BITS.  It seems worth holding
on to the identifier though, for documentation purposes.

Move one tcg/*/tcg-target-reg-bits.h to tcg/target-reg-bits.h
and remove the others.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
2025-12-19 15:23:02 +11:00
parent 35caceb700
commit 9cc902d0bc
11 changed files with 6 additions and 137 deletions
+1 -1
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@@ -24,7 +24,7 @@
#include <ffi.h>
#pragma GCC diagnostic pop
#endif
#include "tcg-target-reg-bits.h"
#include "tcg/target-reg-bits.h"
#define MAX_CALL_IARGS 7
@@ -7,10 +7,10 @@
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#ifndef _ARCH_PPC64
# error Expecting 64-bit host architecture
#endif
/*
* We only support 64-bit hosts now.
* Retain the identifier for documentation.
*/
#define TCG_TARGET_REG_BITS 64
#endif
+1 -1
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@@ -31,7 +31,7 @@
#include "qemu/plugin.h"
#include "qemu/queue.h"
#include "tcg/tcg-mo.h"
#include "tcg-target-reg-bits.h"
#include "tcg/target-reg-bits.h"
#include "tcg-target.h"
#include "tcg/tcg-cond.h"
#include "tcg/insn-start-words.h"
-12
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@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Define target-specific register size
* Copyright (c) 2023 Linaro
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS 64
#endif
-21
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@@ -1,21 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
/*
* Loongson removed the (incomplete) 32-bit support from kernel and toolchain
* for the initial upstreaming of this architecture, so don't bother and just
* support the LP64* ABI for now.
*/
#if defined(__loongarch64)
# define TCG_TARGET_REG_BITS 64
#else
# error unsupported LoongArch register size
#endif
#endif
-16
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@@ -1,16 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2008-2009 Arnaud Patard <arnaud.patard@rtp-net.org>
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#if !defined(_MIPS_SIM) || _MIPS_SIM != _ABI64
# error "Unknown ABI"
#endif
#define TCG_TARGET_REG_BITS 64
#endif
-19
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@@ -1,19 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2018 SiFive, Inc
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
/*
* We don't support oversize guests.
* Since we will only build tcg once, this in turn requires a 64-bit host.
*/
#if __riscv_xlen != 64
#error "unsupported code generation mode"
#endif
#define TCG_TARGET_REG_BITS 64
#endif
-17
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@@ -1,17 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
/* We only support generating code for 64-bit mode. */
#if UINTPTR_MAX == UINT64_MAX
# define TCG_TARGET_REG_BITS 64
#else
# error "unsupported code generation mode"
#endif
#endif
-12
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@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2023 Linaro
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS 64
#endif
-18
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@@ -1,18 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2009, 2011 Stefan Weil
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#if UINTPTR_MAX == UINT32_MAX
# define TCG_TARGET_REG_BITS 32
#elif UINTPTR_MAX == UINT64_MAX
# define TCG_TARGET_REG_BITS 64
#else
# error Unknown pointer size for tci target
#endif
#endif
-16
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@@ -1,16 +0,0 @@
/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2008 Fabrice Bellard
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#ifdef __x86_64__
# define TCG_TARGET_REG_BITS 64
#else
# error
#endif
#endif